Ioannis Tsiokanos is a Senior Digital Design Engineer with a strong foundation in both academia and industry. He holds a B.Sc. and M.Sc. in Computer Engineering from the University of Thessaly, and a Ph.D. in Electrical and Computer Engineering from Queen’s University Belfast, where he continues to serve as a Visiting Fellow.
Ioannis has contributed to advanced chip design projects at leading organizations including U-blox and CERN, working on wireless communication systems and radiation-hardened pixel sensors.
At Smart Silicon, he designs and verifies robust hardware modules for automotive applications, with a focus on safety-critical compliance and performance reliability.
His expertise spans ASIC design, fault-tolerant computing, machine learning-based timing models, and hardware security. He has authored over 15 publications in top-tier conferences and was awarded the Best Paper Award at DATE 2020. Known for his clarity in both technical collaboration and academic communication, Ioannis thrives in interdisciplinary and multicultural engineering teams.”
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