Ioannis Marinos Koutoulas is a Verification Engineer at Smart Silicon, having joined the team full-time after successfully completing his internship in digital verification. He is currently in the final year of an Integrated Master’s program in Electrical and Computer Engineering at the Democritus University of Thrace, with a specialization in Electronic and Information Systems.
During his internship at Smart Silicon, Ioannis gained hands-on experience in UVM-based verification, SystemVerilog Assertions (SVA), and functional coverage, contributing to real-world projects with growing technical responsibility. Prior to this, he completed an Embedded Systems Engineering Internship at Aidplex, where he worked on firmware development, PCB design, and manual mobile app testing.
His academic work includes a diploma thesis on integrating a matrix processing unit into a high-performance RISC-V processor, reflecting his interest in both digital circuit design and system-level hardware architecture.
Ioannis is proficient in SystemVerilog, Python, C, and MATLAB, and has experience using tools such as ModelSim, Xcelium, and Xilinx Vivado. He is a native Greek speaker, fluent in English (C2), and conversational in German (B2).”
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